Fan-Out Wafer-Level Packaging
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Beschreibung
This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood.
Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.
This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood.
Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.
Addresses fan-out wafer-level packaging (FOWLP), in theory and particularly in engineering practice Studies in detail FOWLP design, materials, processes, fabrication, and reliability assessments Presents the latest research and development findings, offering a “one-stop” guide to the state of the art of FOWLP Provides the first comprehensive and in-depth guide to FOWLP Offers cutting-edge information on the most important new developments in electronic packaging for microelectronics
Autor*in
John H. Lau
Themen in »Fan-Out Wafer-Level Packaging«
Fan-Out Wafer-Level Packaging (FOWLP) Fan-out Panel-Level Packaging (FOPLP) Reconstituted carrier RDL (redistribution layer) – dielectric and conductor layers FOWLP with chip-first and die face-down FOWLP with chip-first and die face-up FOWLP with chip-last or RDL-first EMC (epoxy molding compound) Compression molding and PMC (post mold cure) Warpage and die shift Temporary bonding and de-bonding 3D IC heterogeneous integration by FOWLP FOWLP thermal management FOWLP reliability FOWLP technology
Stimmen zu »Fan-Out Wafer-Level Packaging«
“It is a good resource to demonstrate the many facets of advance packaging engineering and can serve as a very informative technical reference. Valuable as a learning tool of semiconductor packaging and reliability, its clear relevance to real world industry practices make it useful for both academics and semiconductor industry practitioners.” (Chong Leong Gan and Hem Takiar, Life Cycle Reliability and Safety Engineering, June 8, 2020)
“This is a unique book written by well known & distinguished expert Dr. John Lau … reading this book will be an eye-opening journal to all who want to truly understand fan-out wafer level packaging. You will find so many details and state-of-the-art information in this book. … I consider this is an excellent book with great value either to read or as a reference resource, and definitely I will strongly recommend it to my colleagues and friends.” (Yong Liu, Amazon.com, June, 2018)
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