Kaushik VLSI Design and Test

VLSI Design and Test

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21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers

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Beschreibung

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.


Includes supplementary material: sn.pub/extras

Autor*in

Brajesh Kumar Kaushik

Themen in »VLSI Design and Test«

Analog/Mixed Signal Architecture and CAD Circuits Design Verification Devices and Technology – I Devices and Technology – II Digital circuits Digital design Embedded systems Emerging Technologies and Memory Low Power Design and Test Multi-processor architectures Network-on-chip RF Circuits SRAM arrays

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Details

ISBN: 9789811074691
Verlag: Springer Singapore
Erscheinung: 22.12.2017

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