VLSI Memory Chip Design
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Beschreibung
This book features a systematic description of microelectronic device design ranging from the basics to current topics, such as low-power/ultralow-voltage designs including subthreshold current reduction, memory subsystem designs for modern DRAMs and various on-chip supply-voltage conversion techniques. It also covers process and device issues as well as design issues relating to systems, circuits, devices and processes, such as signal-to-noise and redundancy.
This book on the design of very large-scale integration of microelectronic memory chips has been written by the worldwide leading reseacher and developer, Kiyoo Itoh who is a Hitachi Fellow.
This book is based on the author's 30-year design career in industry It includes more than 400 figures Includes supplementary material: sn.pub/extras
Autor*in
Kiyoo Itoh
Themen in »VLSI Memory Chip Design«
DRAM Dram design and technology High signal-to-noise cell and array designs High-speed subsystem memories Low-power and ultralow-voltage design On-chip voltage converters RAM VLSI integrated circuit