Formal Techniques in Real-Time and Fault-Tolerant Systems
7th International Symposium, FTRTFT 2002, Co-sponsored by IFIP WG 2.2, Oldenburg, Germany, September 9-12, 2002. Proceedings
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Beschreibung
This volume contains the proceedings of FTRTFT 2002, the International S- posium on Formal Techniques in Real-Time and Fault-Tolerant Systems, held at the University of Oldenburg, Germany, 9–12 September 2002. This sym- sium was the seventh in a series of FTRTFT symposia devoted to problems and solutions in safe system design. The previous symposia took place in Warwick 1990, Nijmegen 1992, Lub ¨ eck 1994, Uppsala 1996, Lyngby 1998, and Pune 2000. Proceedings of these symposia were published as volumes 331, 571, 863, 1135, 1486, and 1926 in the LNCS series by Springer-Verlag. This year the sym- sium was co-sponsored by IFIP Working Group 2.2 on Formal Description of Programming Concepts. The symposium presented advances in the development and use of formal techniques in the design of real-time, hybrid, fault-tolerant embedded systems, covering all stages from requirements analysis to hardware and/or software - plementation. Particular emphasis was placed on UML-based development of real-time systems. Through invited presentations, links between the dependable systems and formal methods research communities were strengthened. With the increasing use of such formal techniques in industrial settings, the conference aimed at stimulating cross-fertilization between challenges in industrial usages of formal methods and advanced research. Inresponsetothecallforpapers,39submissionswerereceived.Eachsubm- sion was reviewed by four program committee members assisted by additional referees. At the end of the reviewing process, the program committee accepted 17 papers for presentation at the symposium.
Includes supplementary material: sn.pub/extras
Autor*in
Werner Damm
Themen in »Formal Techniques in Real-Time and Fault-Tolerant Systems«
Erfüllbarkeitsproblem der Aussagenlogik Interrupt Scheduling algorithms architecture automata formal verification logic operating system