Separation Logic for High-level Synthesis
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Beschreibung
This book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial ‘state of the art’. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip’s physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications.<
This book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial ‘state of the art’. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip’s physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications.<
Proposes highly novel program-analysis techniques for the automatic synthesis of digital circuits from high-level programming languages Is extremely timely as the proposed techniques are useful building blocks for future programming environments targeting the tightly coupled microprocessor-field-programmable gate array (FPGA) systems arising in data centre applications Contributes to interdisciplinary research by combining theoretical computer science with practical implementations of the theory in the context of digital hardware design Shows the effectiveness of the approach in demonstrably practical applications Includes supplementary material: sn.pub/extras
Autor*in
Felix Winterstein
Themen in »Separation Logic for High-level Synthesis«
High-level Synthesis FPGA Memory System Dynamic Data Structures Separation Logic