Formal Verification of Simulink/Stateflow Diagrams

Beschreibung

This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies.  Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure theory and techniques to real applications, and hopefully will be inspired to start to use the proposed approach, or even develop their own formal methods in their future work.
This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies.  Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure theory and techniques to real applications, and hopefully will be inspired to start to use the proposed approach, or even develop their own formal methods in their future work.
Provides development of the method, from theories to implementations, and then to applications Covers a broad range of topics, both theoretical and practical, including hybrid systems, deductive verification, Duration Calculus, dynamical systems, computer algebra, Simulink/Stateflow, Isabelle theorem prover, etc. Uses "hands-on" presentation of implementations and case studies from real industrial systems Includes supplementary material: sn.pub/extras

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Naijun Zhan

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Automated Theorem Proving Deductive Verification Formal Methods Formal Methods in System Design Formal Verification Simulink Stateflow Diagrams

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“The book is an enjoyable reading and provides a thorough overview of the verification of embedded systems using Simulink and Stateflow as advertised by the title. The book provides the mathematical foundations as well as real-world applications of the presented approaches and can easily be appreciated by most graduates of computer science.” (Andreas Maletti, zbMath 1412.68006, 2019)
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