New Data Structures and Algorithms for Logic Synthesis and Verification
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Beschreibung
This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines.
· Provides a comprehensive, theoretical study on majority and biconditional logic for logic synthesis;
· Updates the current scenario in synthesis and verification – especially in light of emerging technologies;
· Demonstrates applications to CMOS technology and emerging technologies.
This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines.
Provides a comprehensive, theoretical study on majority and biconditional logic for logic synthesis Updates the current scenario in synthesis and verification – especially in light of emerging technologies Demonstrates applications to CMOS technology and emerging technologies Includes supplementary material: sn.pub/extras
Autor*in
Luca Gaetano Amaru
Themen in »New Data Structures and Algorithms for Logic Synthesis and Verification«
Logic Verification Logic Optimization Formal methods VLSI logic synthesis Digital logic synthesis Logic circuit synthesis