Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications
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Beschreibung
This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized bythe use of comprehensive MOSFET subthreshold operation.
This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed patternnoise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.
Nominated as an outstanding PhD thesis by the Universitat Politècnica de Catalunya Reports on significant advances in solid-state IR imaging Describes a comprehensive, multidisciplinary research approach Lays the foundations of PbSe-based uncooled MWIR vision
Autor*in
Josep Maria Margarit
Themen in »Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications«
Monolithic Image Sensors Vapour Phase Deposition (VPD) PbSe CMOS Readout Integrated Circuits (ROICs) Digital Pixel Sensor (DPS) Fixed-pattern Noise (FPN) Calibration High-speed MWIR Imagers Uncooled Photonic Sensors Low-power Mixed-signal VLSI Design Event-driven Imagers