Low-Noise Low-Power Design for Phase-Locked Loops
Multi-Phase High-Performance Oscillators
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Beschreibung
This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.
This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.
Provides detailed introduction to noise reduction techniques for fractional-N phase-locked loop systems Analyzes the nonlinear effect and its impact on fractional-N phase-locked loop systems Describes a wide-band integer-N PLL and bandgap reference design for X-band radar application Explains details of capacitive-coupling techniques for robust quadrature voltage-controlled oscillator (VCO) designs and multi-phase clock generation Presents basic simulation techniques for quadrature VCO to guarantee robust design Includes supplementary material: sn.pub/extras
Autor*in
Feng Zhao
Themen in »Low-Noise Low-Power Design for Phase-Locked Loops«
Clock Generation for Wireless Communication Frequency Synthesis for Phase-Locked Loops Low Power Design for Phase-Locked Loops Noise Reduction for Phase-Locked Loops Phase-Locked Loops Quadrature Oscillators Quadrature Signal Generation Wireless Communication