Understanding Logic Locking
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Beschreibung
This book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO’s and DON’Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking.
- Covers modern VLSI design, testability and debug, and hardware security threats at different levels of abstraction;
- Provides a comprehensive overview of logic locking techniques and their applications to hardware security;
- Covers logic locking from implementation to evaluation, different assumptions, models and abstraction layers.
This book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO’s and DON’Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking.
Covers modern VLSI design, testability and debug, and hardware security threats at different levels of abstraction Provides a comprehensive overview of logic locking techniques and their applications to hardware security Covers logic locking from implementation to evaluation, different assumptions, models and abstraction layers
Autor*in
Kimia Zamiri Azar
Themen in »Understanding Logic Locking«
Hardware Security and Trust Trustworthy Hardware Design IP Protection in VLSI Design Hardware Protection through Obfuscation Combinational Logic Locking