How Transistor Area Shrank by 1 Million Fold
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Beschreibung
This book explains in layman’s terms how CMOS transistors work. The author explains step-by-step how CMOS transistors are built, along with an explanation of the purpose of each process step. He describes for readers the key inventions and developments in science and engineering that overcame huge obstacles, enabling engineers to shrink transistor area by over 1 million fold and build billions of transistor switches that switch over a billion times a second, all on a piece of silicon smaller than a thumbnail.
- Written from a process integration point of view, in language accessible to a wide variety of readers;
- Provides readers with an understanding of how transistors work, how they are built, and the equipment used to build them;
- Describes the incredible science and engineering that was developed to keep transistor scaling on a Moore’s Law trajectory – (transistor area reduced by half every 2 to 3 years);
- Enables readers to understand the engineering choices and compromises made while scaling transistors ever smaller, with the constraints that they switch ever faster and use less and less power.
This book explains in layman’s terms how CMOS transistors work. The author explains step-by-step how CMOS transistors are built, along with an explanation of the purpose of each process step. He describes for readers the key inventions and developments in science and engineering that overcame huge obstacles, enabling engineers to shrink transistor area by over 1 million fold and build billions of transistor switches that switch over a billion times a second, all on a piece of silicon smaller than a thumbnail.
Written from a process integration point of view, in language accessible to a wide variety of readers Provides readers with an understanding of how transistors work, how they are built, and the equipment used to build them Describes the incredible science and engineering that was developed to keep transistor scaling on a Moore’s Law trajectory – (transistor area reduced by half every 2 to 3 years) Enables readers to understand the engineering choices and compromises made while scaling transistors ever smaller, with the constraints that they switch ever faster and use less and less power
Autor*in
Howard Tigelaar
Themen in »How Transistor Area Shrank by 1 Million Fold«
History of Transistor Scaling Moore’s Law Semiconductors and Insulators Scaling Lithography Chemistry Lithography Enhancements