Heterogeneous Multicore Processor Technologies for Embedded Systems
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Beschreibung
To satisfy the higher requirements of digitally converged embedded systems, this book describes heterogeneous multicore technology that uses various kinds of low-power embedded processor cores on a single chip. With this technology, heterogeneous parallelism can be implemented on an SoC, and greater flexibility and superior performance per watt can then be achieved. This book defines the heterogeneous multicore architecture and explains in detail several embedded processor cores including CPU cores and special-purpose processor cores that achieve highly arithmetic-level parallelism. The authors developed three multicore chips (called RP-1, RP-2, and RP-X) according to the defined architecture with the introduced processor cores. The chip implementations, software environments, and applications running on the chips are also explained in the book.
- Provides readers an overview and practical discussion of heterogeneous multicore technologies from both a hardware and softwarepoint of view;
- Discusses a new, high-performance and energy efficient approach to designing SoCs for digitally converged, embedded systems;
- Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs;
- Describes three chips developed according to the defined heterogeneous multicore architecture, including chip implementations, software environments, and working applications.
To satisfy the higher requirements of digitally converged embedded systems, this book describes heterogeneous multicore technology that uses various kinds of low-power embedded processor cores on a single chip. With this technology, heterogeneous parallelism can be implemented on an SoC, and greater flexibility and superior performance per watt can then be achieved. This book defines the heterogeneous multicore architecture and explains in detail several embedded processor cores including CPU cores and special-purpose processor cores that achieve highly arithmetic-level parallelism. The authors developed three multicore chips (called RP-1, RP-2, and RP-X) according to the defined architecture with the introduced processor cores. The chip implementations, software environments, and applications running on the chips are also explained in the book.
- Provides readers an overview and practical discussion of heterogeneous multicore technologies from both a hardware and softwarepoint of view;
- Discusses a new, high-performance and energy efficient approach to designing SoCs for digitally converged, embedded systems;
- Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs;
- Describes three chips developed according to the defined heterogeneous multicore architecture, including chip implementations, software environments, and working applications.
Offers first, single-source reference to heterogeneous multicore technologies Discusses a new approach to designing SoCs for future embedded systems Based on the results of a 6-year multicore project where the multicore chips and software programs executed on the chips have been developed and evaluated Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs Includes supplementary material: sn.pub/extras
Autor*in
Kunio Uchiyama
Themen in »Heterogeneous Multicore Processor Technologies for Embedded Systems«
Chip Multiprocessors Embedded Systems Heterogeneous Multicore Processors Heterogeneous parallelism Integrated Circuits Microprocessors Multicore Processors Parallel Systems SoC System on Chip