High Performance Memory Systems
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Beschreibung
Today, the more rapid rate of speed increase in microprocessor technology than in memory has created a serious memory gap (or "wall") for computer designers and manufacturers.
Edited by leading international authorities in the field, High Performance Memory Systems surveys advances in technology, architecture, and algorithms that address both scalability needs in multiprocessors and the expanding gap between CPU/network and memory speeds. The range of approaches described here address issues present on uni-processor systems as well as on multi-processor systems. Current research highlights from both industry and academia focus on: coherence, synchronization, and allocation; power-awareness, reliability, and reconfigurability; software-based memory tuning; architecture design issues; and workload considerations.
Topics and features:
* Describes leading-edge research relevant to the growing disparity between CPU and memory speed
* Provides theoretical and practical approaches to the memory-wall problem, including some from recent worldwide symposiums on the topic
* Includes specific solutions to common problems in different operating environments
* Offers a broad overview of high performance memory systems, as well as in-depth discussions of select, essential areas
* Includes a concise, thorough introductory chapter about the field
This unique and comprehensive compendium assembles the work by leading researchers and professionals into aspects of improving the memory-system performance of general-purpose programs. It is ideally suited for researchers and R&D professionals with interests, or practice, in computer engineering, computer architecture, memory design, and general processor architecture.
The State of Memory Technology Over the past decade there has been rapid growth in the speed of micropro cessors. CPU speeds are approximately doubling every eighteen months, while main memory speed doubles about every ten years. The International Tech nology Roadmap for Semiconductors (ITRS) study suggests that memory will remain on its current growth path. The ITRS short-and long-term targets indicate continued scaling improvements at about the current rate by 2016. This translates to bit densities increasing at two times every two years until the introduction of 8 gigabit dynamic random access memory (DRAM) chips, after which densities will increase four times every five years. A similar growth pattern is forecast for other high-density chip areas and high-performance logic (e.g., microprocessors and application specific inte grated circuits (ASICs)). In the future, molecular devices, 64 gigabit DRAMs and 28 GHz clock signals are targeted. Although densities continue to grow, we still do not see significant advances that will improve memory speed. These trends have created a problem that has been labeled the Memory Wall or Memory Gap.
Edited by leading international authorities in the field, this new work provides a survey from researchers and practitioners on advances in technology, architecture, and algorithms that address scalability needs in multiprocessors and the expanding gap between CPU/network and memory speeds. It is ideally suited to researchers and R & D professionals with interests or practice in computer engineering, computer architecture, and processor architecture.
Autor*in
Haldun Hadimioglu
Themen in »High Performance Memory Systems«
Hardware Random Access Memory algorithms architecture computer computer architecture computer engineering microprocessor performance processor reliability