The Simple Art of SoC Design

Beschreibung

This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs.* Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs; * Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces;* Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs. Early praise for The Simple Art of SoC Design…I have enjoyed reading and reviewing the draft material for this book as Mike has developed and refined the content. His clarity and insight, gained from working with a range of mutual customers and SOC designers, shines through.Working in an industry where successful IP deployment is fundamental to product success, I found that this book addresses practically what the designer must focus on, from specification, partitioning and clean interfacing through implementation to verification.Highly recommended whether you are newly starting out in SoC design, or you are an industry veteran weighed down with ever more complex system integration challenges.David FlynnFellow, Research & Development, ARM LtdPart-Time Visiting Professor in Electronics and Computer Science, University of Southampton, UK
This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs.
Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs Includes supplementary material: sn.pub/extras

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Synopsys Fellow Keating

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Circuits and Systems Embedded Systems High-Level Synthesis System Level Verification System on Chip

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