Transaction-Level Modeling with SystemC

Beschreibung

Transaction-Level Modeling with SystemC presents the formalized abstraction and related methodology defined at STMicroelectronics, and covers all major topics related to the Electronic System-Level (ESL) industry:- TLM modeling concepts - Early embedded software development based on SoC virtual prototypes - Functional verification using reference models - Architecture analysis with mixed TLM and cycle accurate platforms - Unifying TLM and RTL with platform automation tools Complementary to the book, open source code to put this approach
A thorough professional overview on Transaction Level Modeling, with contributors from academia and industry Presents the formalized abstraction and related methodology of transaction level modeling Discusses functional verification using reference models The book lists several URLs for obtaining open source software that puts this approach into practice Includes supplementary material: sn.pub/extras

Autor*in

Frank Ghenassia

Themen in »Transaction-Level Modeling with SystemC«

RTL SoC Standard SystemC architecture automation design design automation development embedded systems model modeling software system system on chip (SoC)

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