Planar Double-Gate Transistor

Beschreibung

This book on Double-Gates devices and circuit is unique and aims to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary cells. The goal is to point out how we can take advantage of new transistor structures to come up with new basic cells and concepts that exploit the electrical features of these new devices and the breakthrough they bring. Planar Double-Gate Transistor will mainly focus on SOI CMOS transistors, fully depleted with double independent planar Gates (Independent Planar Double Gates Transistors: IPDGT), a potential candidate for the sub-32 nm technological nodes as planned by the current ITRS Roadmap. The book topics are mainly focusing on: Detailed description of specific processes that allow the optimization of the CMOS IPDGT device CMOS IPDGT modeling, both compact and physical models are presented Device characterization Design of innovating cells (SRAM cells, basic digital & analog functions) with the objectives to improve the level of integration and the robustness to variability as well as the power consumption optimization, using the degree of freedom introduced by the independent gates.
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore’s law and each dif?culty has found a solution.
First book dealing with Technology and Design Interaction Presents a cross-disciplinary based approach to optimize a new and complex technology Covers all aspects of IC Design with advanced technologies: process, device modelling, characterization, and circuit design of analogue, digital and memory circuits Introduces new circuit concepts taking benefit of the double-gate device structures

Autor*in

Amara Amara

Themen in »Planar Double-Gate Transistor«

CMOS Circuit Design Compact modelling Double-Gate MOSFET Fully Depleted Silicon On Insulator Leistungsfeldeffekttransistor analog circuit design analog design digital design field-effect transistor integrated circuit metal oxide semiconductur f

Stimmen zu »Planar Double-Gate Transistor«

Details

Link teilen