Logic and Architecture Synthesis
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Beschreibung
This book describes several methods and systems solving one of the highlighted problems within computer aided design, namely architectural and logic synthesis. The book emphasises the most recent technologies in high level synthesis, concentrating on applicative studies and practical constraints or criteria during synthesis. Logic and Architecture Synthesis concentrates on the practical problems involving automatic synthesis of designs. It is essential reading for researchers and CAD Managers working in this area.
Autor*in
Gabriele Saucier
Themen in »Logic and Architecture Synthesis«
ASIC CAD Design FPGA Field Programmable Gate Array RAM ROM VHDL VLSI algorithms architecture metal-oxide-semiconductor transistor microprocessor optimization static-induction transistor